DC ANALYSIS OF p-n-p-n TUNNELING FIELD-EFFECT TRANSISTOR BASED ON In0.35Ga0.65As
Behnam Dorostkar, Saeid Marjani
Holos · 2018
doi:10.15628/holos.2018.6173 (opens in a new tab)
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Abstract
Using calibrated simulations, we report the In0.35Ga0.65As based tunnel field-effect transistor (TFET) with thin δ-doped n+ pocket at the source-channel interface to improve the parameters such as on current (Ion), off-current (Ioff) and subthreshold swing (SS). The simulations results of proposed device is compared with analytical model that is shown with high precision of DC parameters by examining the effects of III-V semiconductor materials. Furthermore, the influence of pocket doping, pocket width, doping level, effective oxide thickness (EOT), temperature and mole fraction of III-V semiconductor material on device performance have been investigated. The results show that proposed device has a higher ON current (1×10-5 A/µm) and a steeper subthreshold swing (35 mV/decade) as compared with the conventional TFET. It shows a lot of promise for future scale CMOS technology for low voltage and high frequency application
Abstract licence: CC BY
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