A 60 GHz Rhombic Patch Array Antenna With High Gain, Low Sidelobe Level, and Reduced Array Area

This work designs a 60 GHz rhombic patch array antenna with high gain, low sidelobe level (SLL), and reduced array area. This antenna consists of eight linear serial arrays with varying number of patches. A slot-coupled center-fed structure of substrate-integrated waveguide (SIW) is designed to simplify the complex feed network required for direct excitation of planar arrays and reduce insertion loss. The rhombic configuration utilizes the quantity ratio of patches for equivalent taper excitation to reduce SLL, rather than the use of tapered width as in traditional designs, which can achieve high gain and avoid cumbersome resizing of patches and connecting lines. An array factor analysis method is proposed to predict the SLL of the antenna. To form a planar array and further reduce the H-plane SLL, a &#x2212;25-dB Dolph-Chebyshev SIW feed network is constructed. The measured gain of the rhombic array antenna is 18.2 dBi, and the E-plane and H-plane SLLs are less than &#x2212;20 dB and &#x2212;25 dB, respectively. This work also simulates a reference uniformly excited high-gain 8 <inline-formula> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 10 array antenna. Compared to this reference antenna, the proposed rhombic array antenna has similar simulated gain but much lower SLL and 23&#x0025; smaller array area.

Abstract licence: CC BY-NC-ND

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