Skip to content
naulon
Not checkedNot checked for notices yet.

Signal acquisition and processing system based on zynq dual core

Tan Jingjia, He Lesheng, Wang Jun

MATEC Web of Conferences · 2018

doi:10.1051/matecconf/201824603001 (opens in a new tab)

We email you when a new notice or a question about this paper appears.

Abstract

In order to speed up the acquisition and processing of signal, this paper has developed a signal acquisition and processing system based on zynq platform. Based on the ARM Cortex-A9 dual-core and editable logic unit architecture of Zynq AP SoC platform, this paper implements a fully functional signal acquisition and processing system by software and hardware collaborative design. ARM0 is the main processor that controls system and shared resources. ARM1 is the slave processor. ARM1 is responsible for receiving the data converted by the AD7606 analog-to-digital chip. The data is sent to the Hamming window function IP core created under vivado HLS through the AXI bus. After the data is processed by Hamming window function, it is sent to ARM1 again through AXI bus. OCM acts as the shared memory for ARM0 and ARM1 communication. The Linux system runs on ARM0. The processed data is sent to the upper computer through ethernet through UDP protocol. Utilizing the architecture of the Zynq platform, the system efficiency is improved, and the stability of the system is ensured, so that the FPGA can enter the field of embedded systems.

Abstract licence: CC BY

References2

    2 more references, whose wording the paper’s licence keeps private.

    Reads

    Read by people on this page

    None yet.

    Checked or read by AI through naulon

    None yet.

    A person counts once a day per paper. We keep no cookie and no address: a reader is a hash that changes every day. Any month under five reads shows no number.

    Are you an author?

    Is this your paper?

    Claim it to add your note and be paid when agents cite it. Free.