Design and implementation of a fault detection method for a PV‐fed DC‐microgrid with power control mechanism
Muhammad Zakir, Ammar Arshad, Hadeed Ahmed Sher and 1 more
IET Electric Power Applications · 2022
doi:10.1049/elp2.12212 (opens in a new tab)
We email you when a new notice or a question about this paper appears.
Abstract
Abstract This paper presents practical implementation of a fault detection, localisation, and categorisation (FDLC) method in PV‐fed DC‐microgrid (DCMG). The DCMG is implemented by utilising a group of two DC nanogrids (DCNG) that have power control mechanism (PCM). The FDLC uses a voltage calculating circuit comprising a single voltage sensor and diode network. Moreover, the architecture is based on six statements extracted from the investigation of line to line (L–L) and line to ground (L–G) faults at a DCNG of the cluster. The PCM in the proposed system utilises a power triggering circuit for effective power flow among the different units of the DCNG considering the load demands and the resource availability. Experimentation is carried out by creating L–L/L–G faults at different points in the DCMG. Detection, localisation, and classification of faults is performed by utilising the sensor's voltage and power of the individual DCNG. FDLC offers less computational burden, perform fast detection of fault, and is capable of distinguishing between the L–L/L–G faults and uniform irradiance and partial shading conditions in the PV‐array. The proposed FDLC technique and its six statements are verified through experimental results.
Abstract licence: CC BY-ND
Reads
Read by people on this page
None yet.
Checked or read by AI through naulon
None yet.
A person counts once a day per paper. We keep no cookie and no address: a reader is a hash that changes every day. Any month under five reads shows no number.
Are you an author?
Is this your paper?
Claim it to add your note and be paid when agents cite it. Free.