A dual‐rate burst‐mode receiver with rapid response and high CID tolerance for XGS PON

Abstract A burst‐mode receiver chip‐set including a preamplifier and limiting amplifier which can recover both 9.95 Gb/s and 2.49 Gbit/s packets within a short 64.3 ns preamble time is described in this paper. This receiver is also able to settle while receiving a packet that includes over 72 bits of CID. To realise these characteristics, we placed a rapid peak‐detecting AGC in the preamplifier IC and a rapid discharge block between the ICs. Our receiver achieved high sensitivities of –31.2 dBm for 9.95 Gb/s and –36.5 dBm for 2.49 Gb/s within a 64.3 ns preamble and with a payload packet that includes 72 bits of CID. In addition, this receiver meets the ITU‐T G.9807.1 E1 and G.987.2 E1 Recommendations even if a packet includes such long stretches of constant signal level as 768 bits of CID in the case of 9.95 Gb/s and 256 bits of CID in the case of 2.49 Gb/s.

Abstract licence: CC BY-ND

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